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+/* Copyright 2019 Drew Mills
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+ *
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+ * This program is free software: you can redistribute it and/or modify
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+ * it under the terms of the GNU General Public License as published by
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+ * the Free Software Foundation, either version 2 of the License, or
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+ * (at your option) any later version.
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+ *
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+ * This program is distributed in the hope that it will be useful,
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+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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+ * GNU General Public License for more details.
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+ *
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+ * You should have received a copy of the GNU General Public License
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+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
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+ */
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+
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+#include "analog.h"
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+#include "quantum.h"
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+
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+
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+/* User configurable ADC options */
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+#ifndef ADC_CIRCULAR_BUFFER
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+#define ADC_CIRCULAR_BUFFER FALSE
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+#endif
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+
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+#ifndef ADC_NUM_CHANNELS
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+#define ADC_NUM_CHANNELS 1
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+#elif ADC_NUM_CHANNELS != 1
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+#error "The ARM ADC implementation currently only supports reading one channel at a time."
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+#endif
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+
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+#ifndef ADC_BUFFER_DEPTH
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+#define ADC_BUFFER_DEPTH 2
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+#endif
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+
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+// For more sampling rate options, look at hal_adc_lld.h in ChibiOS
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+#ifndef ADC_SAMPLING_RATE
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+#define ADC_SAMPLING_RATE ADC_SMPR_SMP_1P5
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+#endif
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+
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+// Options are 12, 10, 8, and 6 bit.
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+#ifndef ADC_RESOLUTION
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+#define ADC_RESOLUTION ADC_CFGR1_RES_12BIT
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+#endif
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+
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+
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+
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+static ADCConfig adcCfg = {};
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+static adcsample_t sampleBuffer[ADC_NUM_CHANNELS * ADC_BUFFER_DEPTH];
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+
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+// Initialize to max number of ADCs, set to empty object to initialize all to false.
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+#if defined(STM32F0XX)
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+static bool adcInitialized[1] = {};
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+#elif defined(STM32F3XX)
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+static bool adcInitialized[4] = {};
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+#else
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+#error "adcInitialized has not been implemented for this ARM microcontroller."
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+#endif
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+
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+
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+
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+static ADCConversionGroup adcConversionGroup = {
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+ ADC_CIRCULAR_BUFFER,
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+ (uint16_t)(ADC_NUM_CHANNELS),
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+ NULL, // No end callback
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+ NULL, // No error callback
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+#if defined(STM32F0XX)
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+ ADC_CFGR1_CONT | ADC_RESOLUTION,
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+ ADC_TR(0, 0).
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+ ADC_SAMPLING_RATE,
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+ NULL, // Doesn't specify a default channel
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+#elif defined(STM32F3XX)
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+ ADC_CFGR_CONT | ADC_RESOLUTION,
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+ ADC_TR(0, 4095),
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+ {
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+ ADC_SAMPLING_RATE,
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+ ADC_SAMPLING_RATE,
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+ },
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+ {
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+ 0, // Doesn't specify a default channel
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+ 0,
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+ 0,
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+ 0,
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+ },
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+#endif
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+};
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+
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+
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+
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+static inline ADCDriver* intToADCDriver(uint8_t adcInt) {
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+
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+ ADCDriver* target;
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+
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+ switch (adcInt) {
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+ // clang-format off
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+#if STM32_ADC_USE_ADC1
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+ case 0: target = &ADCD1; break;
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+#endif
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+#if STM32_ADC_USE_ADC2
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+ case 1: target = &ADCD2; break;
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+#endif
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+#if STM32_ADC_USE_ADC3
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+ case 2: target = &ADCD3; break;
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+#endif
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+#if STM32_ADC_USE_ADC4
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+ case 3: target = &ADCD4; break;
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+#endif
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+ default: target = NULL; break;
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+ // clang-format on
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+ }
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+
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+ return target;
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+}
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+
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+static inline void manageAdcInitializationDriver(uint8_t adc, ADCDriver* adcDriver) {
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+ if (!adcInitialized[adc]) {
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+ adcStart(adcDriver, &adcCfg);
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+ adcInitialized[adc] = true;
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+ }
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+}
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+
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+static inline void manageAdcInitialization(uint8_t adc) {
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+ manageAdcInitializationDriver(adc, intToADCDriver(adc));
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+}
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+
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+pin_and_adc pinToMux(pin_t pin) {
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+ switch(pin) {
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+ // clang-format off
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+#if defined(STM32F0XX)
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+ case A0: return (pin_and_adc){ ADC_CHANNEL_IN0, 0 };
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+ case A1: return (pin_and_adc){ ADC_CHANNEL_IN1, 0 };
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+ case A2: return (pin_and_adc){ ADC_CHANNEL_IN2, 0 };
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+ case A3: return (pin_and_adc){ ADC_CHANNEL_IN3, 0 };
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+ case A4: return (pin_and_adc){ ADC_CHANNEL_IN4, 0 };
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+ case A5: return (pin_and_adc){ ADC_CHANNEL_IN5, 0 };
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+ case A6: return (pin_and_adc){ ADC_CHANNEL_IN6, 0 };
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+ case A7: return (pin_and_adc){ ADC_CHANNEL_IN7, 0 };
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+ case B0: return (pin_and_adc){ ADC_CHANNEL_IN8, 0 };
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+ case B1: return (pin_and_adc){ ADC_CHANNEL_IN9, 0 };
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+ case C0: return (pin_and_adc){ ADC_CHANNEL_IN10, 0 };
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+ case C1: return (pin_and_adc){ ADC_CHANNEL_IN11, 0 };
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+ case C2: return (pin_and_adc){ ADC_CHANNEL_IN12, 0 };
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+ case C3: return (pin_and_adc){ ADC_CHANNEL_IN13, 0 };
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+ case C4: return (pin_and_adc){ ADC_CHANNEL_IN14, 0 };
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+ case C5: return (pin_and_adc){ ADC_CHANNEL_IN15, 0 };
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+#elif defined(STM32F3XX)
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+ case A0: return (pin_and_adc){ ADC_CHANNEL_IN1, 0 };
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+ case A1: return (pin_and_adc){ ADC_CHANNEL_IN2, 0 };
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+ case A2: return (pin_and_adc){ ADC_CHANNEL_IN3, 0 };
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+ case A3: return (pin_and_adc){ ADC_CHANNEL_IN4, 0 };
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+ case A4: return (pin_and_adc){ ADC_CHANNEL_IN1, 1 };
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+ case A5: return (pin_and_adc){ ADC_CHANNEL_IN2, 1 };
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+ case A6: return (pin_and_adc){ ADC_CHANNEL_IN3, 1 };
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+ case A7: return (pin_and_adc){ ADC_CHANNEL_IN4, 1 };
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+ case B0: return (pin_and_adc){ ADC_CHANNEL_IN12, 2 };
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+ case B1: return (pin_and_adc){ ADC_CHANNEL_IN1, 2 };
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+ case B2: return (pin_and_adc){ ADC_CHANNEL_IN12, 1 };
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+ case B12: return (pin_and_adc){ ADC_CHANNEL_IN2, 3 };
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+ case B13: return (pin_and_adc){ ADC_CHANNEL_IN3, 3 };
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+ case B14: return (pin_and_adc){ ADC_CHANNEL_IN4, 3 };
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+ case B15: return (pin_and_adc){ ADC_CHANNEL_IN5, 3 };
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+ case C0: return (pin_and_adc){ ADC_CHANNEL_IN6, 0 }; // Can also be ADC2
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+ case C1: return (pin_and_adc){ ADC_CHANNEL_IN7, 0 }; // Can also be ADC2
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+ case C2: return (pin_and_adc){ ADC_CHANNEL_IN8, 0 }; // Can also be ADC2
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+ case C3: return (pin_and_adc){ ADC_CHANNEL_IN9, 0 }; // Can also be ADC2
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+ case C4: return (pin_and_adc){ ADC_CHANNEL_IN5, 1 };
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+ case C5: return (pin_and_adc){ ADC_CHANNEL_IN11, 1 };
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+ case D8: return (pin_and_adc){ ADC_CHANNEL_IN12, 3 };
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+ case D9: return (pin_and_adc){ ADC_CHANNEL_IN13, 3 };
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+ case D10: return (pin_and_adc){ ADC_CHANNEL_IN7, 2 }; // Can also be ADC4
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+ case D11: return (pin_and_adc){ ADC_CHANNEL_IN8, 2 }; // Can also be ADC4
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+ case D12: return (pin_and_adc){ ADC_CHANNEL_IN9, 2 }; // Can also be ADC4
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+ case D13: return (pin_and_adc){ ADC_CHANNEL_IN10, 2 }; // Can also be ADC4
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+ case D14: return (pin_and_adc){ ADC_CHANNEL_IN11, 2 }; // Can also be ADC4
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+ case E7: return (pin_and_adc){ ADC_CHANNEL_IN13, 2 };
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+ case E8: return (pin_and_adc){ ADC_CHANNEL_IN6, 2 }; // Can also be ADC4
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+ case E9: return (pin_and_adc){ ADC_CHANNEL_IN2, 2 };
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+ case E10: return (pin_and_adc){ ADC_CHANNEL_IN14, 2 };
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+ case E11: return (pin_and_adc){ ADC_CHANNEL_IN15, 2 };
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+ case E12: return (pin_and_adc){ ADC_CHANNEL_IN16, 2 };
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+ case E13: return (pin_and_adc){ ADC_CHANNEL_IN3, 2 };
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+ case E14: return (pin_and_adc){ ADC_CHANNEL_IN1, 3 };
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+ case E15: return (pin_and_adc){ ADC_CHANNEL_IN2, 3 };
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+ case F2: return (pin_and_adc){ ADC_CHANNEL_IN10, 0 }; // Can also be ADC2
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+ case F4: return (pin_and_adc){ ADC_CHANNEL_IN5, 0 };
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+#else
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+#error "An ADC pin-to-mux configuration has not been specified for this microcontroller."
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+#endif
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+ default: return (pin_and_adc){ 0, 0 };
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+ // clang-format on
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+ }
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+}
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+
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+adcsample_t analogReadPin(pin_t pin) {
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+ return adc_read(pinToMux(pin));
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+}
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+
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+adcsample_t analogReadPinAdc(pin_t pin, uint8_t adc) {
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+ pin_and_adc target = pinToMux(pin);
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+ target.adc = adc;
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+ return adc_read(target);
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+}
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+
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+adcsample_t adc_read(pin_and_adc mux) {
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+#if defined(STM32F0XX)
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+ adcConversionGroup.sqr = ADC_CHSELR_CHSEL1;
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+#elif defined(STM32F3XX)
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+ adcConversionGroup.sqr[0] = ADC_SQR1_SQ1_N(mux.pin);
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+#else
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+#error "adc_read has not been updated to support this ARM microcontroller."
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+#endif
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+
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+ ADCDriver* targetDriver = intToADCDriver(mux.adc);
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+ manageAdcInitializationDriver(mux.adc, targetDriver);
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+
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+ adcConvert(targetDriver, &adcConversionGroup, &sampleBuffer[0], ADC_BUFFER_DEPTH);
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+ adcsample_t* result = sampleBuffer;
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+
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+ return *result;
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+}
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Drew Mills