is31fl3733.c 8.5 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237
  1. /* Copyright 2017 Jason Williams
  2. * Copyright 2018 Jack Humbert
  3. * Copyright 2018 Yiancar
  4. *
  5. * This program is free software: you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation, either version 2 of the License, or
  8. * (at your option) any later version.
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program. If not, see <http://www.gnu.org/licenses/>.
  17. */
  18. #include "is31fl3733.h"
  19. #include "i2c_master.h"
  20. #include "wait.h"
  21. // This is a 7-bit address, that gets left-shifted and bit 0
  22. // set to 0 for write, 1 for read (as per I2C protocol)
  23. // The address will vary depending on your wiring:
  24. // 00 <-> GND
  25. // 01 <-> SCL
  26. // 10 <-> SDA
  27. // 11 <-> VCC
  28. // ADDR1 represents A1:A0 of the 7-bit address.
  29. // ADDR2 represents A3:A2 of the 7-bit address.
  30. // The result is: 0b101(ADDR2)(ADDR1)
  31. #define ISSI_ADDR_DEFAULT 0x50
  32. #define ISSI_COMMANDREGISTER 0xFD
  33. #define ISSI_COMMANDREGISTER_WRITELOCK 0xFE
  34. #define ISSI_INTERRUPTMASKREGISTER 0xF0
  35. #define ISSI_INTERRUPTSTATUSREGISTER 0xF1
  36. #define ISSI_PAGE_LEDCONTROL 0x00 // PG0
  37. #define ISSI_PAGE_PWM 0x01 // PG1
  38. #define ISSI_PAGE_AUTOBREATH 0x02 // PG2
  39. #define ISSI_PAGE_FUNCTION 0x03 // PG3
  40. #define ISSI_REG_CONFIGURATION 0x00 // PG3
  41. #define ISSI_REG_GLOBALCURRENT 0x01 // PG3
  42. #define ISSI_REG_RESET 0x11 // PG3
  43. #define ISSI_REG_SWPULLUP 0x0F // PG3
  44. #define ISSI_REG_CSPULLUP 0x10 // PG3
  45. #ifndef ISSI_TIMEOUT
  46. # define ISSI_TIMEOUT 100
  47. #endif
  48. #ifndef ISSI_PERSISTENCE
  49. # define ISSI_PERSISTENCE 0
  50. #endif
  51. // Transfer buffer for TWITransmitData()
  52. uint8_t g_twi_transfer_buffer[20];
  53. // These buffers match the IS31FL3733 PWM registers.
  54. // The control buffers match the PG0 LED On/Off registers.
  55. // Storing them like this is optimal for I2C transfers to the registers.
  56. // We could optimize this and take out the unused registers from these
  57. // buffers and the transfers in IS31FL3733_write_pwm_buffer() but it's
  58. // probably not worth the extra complexity.
  59. uint8_t g_pwm_buffer[DRIVER_COUNT][192];
  60. bool g_pwm_buffer_update_required[DRIVER_COUNT] = {false};
  61. uint8_t g_led_control_registers[DRIVER_COUNT][24] = {0};
  62. bool g_led_control_registers_update_required[DRIVER_COUNT] = {false};
  63. bool IS31FL3733_write_register(uint8_t addr, uint8_t reg, uint8_t data) {
  64. // If the transaction fails function returns false.
  65. g_twi_transfer_buffer[0] = reg;
  66. g_twi_transfer_buffer[1] = data;
  67. #if ISSI_PERSISTENCE > 0
  68. for (uint8_t i = 0; i < ISSI_PERSISTENCE; i++) {
  69. if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, ISSI_TIMEOUT) != 0) {
  70. return false;
  71. }
  72. }
  73. #else
  74. if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, ISSI_TIMEOUT) != 0) {
  75. return false;
  76. }
  77. #endif
  78. return true;
  79. }
  80. bool IS31FL3733_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer) {
  81. // Assumes PG1 is already selected.
  82. // If any of the transactions fails function returns false.
  83. // Transmit PWM registers in 12 transfers of 16 bytes.
  84. // g_twi_transfer_buffer[] is 20 bytes
  85. // Iterate over the pwm_buffer contents at 16 byte intervals.
  86. for (int i = 0; i < 192; i += 16) {
  87. g_twi_transfer_buffer[0] = i;
  88. // Copy the data from i to i+15.
  89. // Device will auto-increment register for data after the first byte
  90. // Thus this sets registers 0x00-0x0F, 0x10-0x1F, etc. in one transfer.
  91. for (int j = 0; j < 16; j++) {
  92. g_twi_transfer_buffer[1 + j] = pwm_buffer[i + j];
  93. }
  94. #if ISSI_PERSISTENCE > 0
  95. for (uint8_t i = 0; i < ISSI_PERSISTENCE; i++) {
  96. if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 17, ISSI_TIMEOUT) != 0) {
  97. return false;
  98. }
  99. }
  100. #else
  101. if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 17, ISSI_TIMEOUT) != 0) {
  102. return false;
  103. }
  104. #endif
  105. }
  106. return true;
  107. }
  108. void IS31FL3733_init(uint8_t addr, uint8_t sync) {
  109. // In order to avoid the LEDs being driven with garbage data
  110. // in the LED driver's PWM registers, shutdown is enabled last.
  111. // Set up the mode and other settings, clear the PWM registers,
  112. // then disable software shutdown.
  113. // Sync is passed so set it according to the datasheet.
  114. // Unlock the command register.
  115. IS31FL3733_write_register(addr, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5);
  116. // Select PG0
  117. IS31FL3733_write_register(addr, ISSI_COMMANDREGISTER, ISSI_PAGE_LEDCONTROL);
  118. // Turn off all LEDs.
  119. for (int i = 0x00; i <= 0x17; i++) {
  120. IS31FL3733_write_register(addr, i, 0x00);
  121. }
  122. // Unlock the command register.
  123. IS31FL3733_write_register(addr, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5);
  124. // Select PG1
  125. IS31FL3733_write_register(addr, ISSI_COMMANDREGISTER, ISSI_PAGE_PWM);
  126. // Set PWM on all LEDs to 0
  127. // No need to setup Breath registers to PWM as that is the default.
  128. for (int i = 0x00; i <= 0xBF; i++) {
  129. IS31FL3733_write_register(addr, i, 0x00);
  130. }
  131. // Unlock the command register.
  132. IS31FL3733_write_register(addr, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5);
  133. // Select PG3
  134. IS31FL3733_write_register(addr, ISSI_COMMANDREGISTER, ISSI_PAGE_FUNCTION);
  135. // Set global current to maximum.
  136. IS31FL3733_write_register(addr, ISSI_REG_GLOBALCURRENT, 0xFF);
  137. // Disable software shutdown.
  138. IS31FL3733_write_register(addr, ISSI_REG_CONFIGURATION, (sync << 6) | 0x01);
  139. // Wait 10ms to ensure the device has woken up.
  140. wait_ms(10);
  141. }
  142. void IS31FL3733_set_color(int index, uint8_t red, uint8_t green, uint8_t blue) {
  143. if (index >= 0 && index < DRIVER_LED_TOTAL) {
  144. is31_led led = g_is31_leds[index];
  145. g_pwm_buffer[led.driver][led.r] = red;
  146. g_pwm_buffer[led.driver][led.g] = green;
  147. g_pwm_buffer[led.driver][led.b] = blue;
  148. g_pwm_buffer_update_required[led.driver] = true;
  149. }
  150. }
  151. void IS31FL3733_set_color_all(uint8_t red, uint8_t green, uint8_t blue) {
  152. for (int i = 0; i < DRIVER_LED_TOTAL; i++) {
  153. IS31FL3733_set_color(i, red, green, blue);
  154. }
  155. }
  156. void IS31FL3733_set_led_control_register(uint8_t index, bool red, bool green, bool blue) {
  157. is31_led led = g_is31_leds[index];
  158. uint8_t control_register_r = led.r / 8;
  159. uint8_t control_register_g = led.g / 8;
  160. uint8_t control_register_b = led.b / 8;
  161. uint8_t bit_r = led.r % 8;
  162. uint8_t bit_g = led.g % 8;
  163. uint8_t bit_b = led.b % 8;
  164. if (red) {
  165. g_led_control_registers[led.driver][control_register_r] |= (1 << bit_r);
  166. } else {
  167. g_led_control_registers[led.driver][control_register_r] &= ~(1 << bit_r);
  168. }
  169. if (green) {
  170. g_led_control_registers[led.driver][control_register_g] |= (1 << bit_g);
  171. } else {
  172. g_led_control_registers[led.driver][control_register_g] &= ~(1 << bit_g);
  173. }
  174. if (blue) {
  175. g_led_control_registers[led.driver][control_register_b] |= (1 << bit_b);
  176. } else {
  177. g_led_control_registers[led.driver][control_register_b] &= ~(1 << bit_b);
  178. }
  179. g_led_control_registers_update_required[led.driver] = true;
  180. }
  181. void IS31FL3733_update_pwm_buffers(uint8_t addr, uint8_t index) {
  182. if (g_pwm_buffer_update_required[index]) {
  183. // Firstly we need to unlock the command register and select PG1.
  184. IS31FL3733_write_register(addr, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5);
  185. IS31FL3733_write_register(addr, ISSI_COMMANDREGISTER, ISSI_PAGE_PWM);
  186. // If any of the transactions fail we risk writing dirty PG0,
  187. // refresh page 0 just in case.
  188. if (!IS31FL3733_write_pwm_buffer(addr, g_pwm_buffer[index])) {
  189. g_led_control_registers_update_required[index] = true;
  190. }
  191. }
  192. g_pwm_buffer_update_required[index] = false;
  193. }
  194. void IS31FL3733_update_led_control_registers(uint8_t addr, uint8_t index) {
  195. if (g_led_control_registers_update_required[index]) {
  196. // Firstly we need to unlock the command register and select PG0
  197. IS31FL3733_write_register(addr, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5);
  198. IS31FL3733_write_register(addr, ISSI_COMMANDREGISTER, ISSI_PAGE_LEDCONTROL);
  199. for (int i = 0; i < 24; i++) {
  200. IS31FL3733_write_register(addr, i, g_led_control_registers[index][i]);
  201. }
  202. }
  203. g_led_control_registers_update_required[index] = false;
  204. }