serial.c 17 KB

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  1. /*
  2. * WARNING: be careful changing this code, it is very timing dependent
  3. *
  4. * 2018-10-28 checked
  5. * avr-gcc 4.9.2
  6. * avr-gcc 5.4.0
  7. * avr-gcc 7.3.0
  8. */
  9. #ifndef F_CPU
  10. # define F_CPU 16000000
  11. #endif
  12. #include <avr/io.h>
  13. #include <avr/interrupt.h>
  14. #include <util/delay.h>
  15. #include <stddef.h>
  16. #include <stdbool.h>
  17. #include "gpio.h"
  18. #include "serial.h"
  19. #ifdef SOFT_SERIAL_PIN
  20. # if !(defined(__AVR_AT90USB646__) || defined(__AVR_AT90USB647__) || defined(__AVR_AT90USB1286__) || defined(__AVR_AT90USB1287__) || defined(__AVR_AT90USB162__) || defined(__AVR_ATmega16U2__) || defined(__AVR_ATmega32U2__) || defined(__AVR_ATmega16U4__) || defined(__AVR_ATmega32U4__))
  21. # error serial.c is not supported for the currently selected MCU
  22. # endif
  23. // if using ATmega32U4/2, AT90USBxxx I2C, can not use PD0 and PD1 in soft serial.
  24. # if defined(__AVR_ATmega16U4__) || defined(__AVR_ATmega32U4__) || defined(__AVR_AT90USB646__) || defined(__AVR_AT90USB647__) || defined(__AVR_AT90USB1286__) || defined(__AVR_AT90USB1287__)
  25. # if defined(USE_AVR_I2C) && (SOFT_SERIAL_PIN == D0 || SOFT_SERIAL_PIN == D1)
  26. # error Using I2C, so can not use PD0, PD1
  27. # endif
  28. # endif
  29. // PD0..PD3, common config
  30. # if SOFT_SERIAL_PIN == D0
  31. # define EIMSK_BIT _BV(INT0)
  32. # define EICRx_BIT (~(_BV(ISC00) | _BV(ISC01)))
  33. # define SERIAL_PIN_INTERRUPT INT0_vect
  34. # define EICRx EICRA
  35. # elif SOFT_SERIAL_PIN == D1
  36. # define EIMSK_BIT _BV(INT1)
  37. # define EICRx_BIT (~(_BV(ISC10) | _BV(ISC11)))
  38. # define SERIAL_PIN_INTERRUPT INT1_vect
  39. # define EICRx EICRA
  40. # elif SOFT_SERIAL_PIN == D2
  41. # define EIMSK_BIT _BV(INT2)
  42. # define EICRx_BIT (~(_BV(ISC20) | _BV(ISC21)))
  43. # define SERIAL_PIN_INTERRUPT INT2_vect
  44. # define EICRx EICRA
  45. # elif SOFT_SERIAL_PIN == D3
  46. # define EIMSK_BIT _BV(INT3)
  47. # define EICRx_BIT (~(_BV(ISC30) | _BV(ISC31)))
  48. # define SERIAL_PIN_INTERRUPT INT3_vect
  49. # define EICRx EICRA
  50. # endif
  51. // ATmegaxxU2/AT90USB162 specific config
  52. # if defined(__AVR_ATmega16U2__) || defined(__AVR_ATmega32U2__) || defined(__AVR_AT90USB162__)
  53. // PD4(INT5), PD6(INT6), PD7(INT7), PC7(INT4)
  54. # if SOFT_SERIAL_PIN == D4
  55. # define EIMSK_BIT _BV(INT5)
  56. # define EICRx_BIT (~(_BV(ISC50) | _BV(ISC51)))
  57. # define SERIAL_PIN_INTERRUPT INT5_vect
  58. # define EICRx EICRB
  59. # elif SOFT_SERIAL_PIN == D6
  60. # define EIMSK_BIT _BV(INT6)
  61. # define EICRx_BIT (~(_BV(ISC60) | _BV(ISC61)))
  62. # define SERIAL_PIN_INTERRUPT INT6_vect
  63. # define EICRx EICRB
  64. # elif SOFT_SERIAL_PIN == D7
  65. # define EIMSK_BIT _BV(INT7)
  66. # define EICRx_BIT (~(_BV(ISC70) | _BV(ISC71)))
  67. # define SERIAL_PIN_INTERRUPT INT7_vect
  68. # define EICRx EICRB
  69. # elif SOFT_SERIAL_PIN == C7
  70. # define EIMSK_BIT _BV(INT4)
  71. # define EICRx_BIT (~(_BV(ISC40) | _BV(ISC41)))
  72. # define SERIAL_PIN_INTERRUPT INT4_vect
  73. # define EICRx EICRB
  74. # endif
  75. # endif
  76. // ATmegaxxU4 specific config
  77. # if defined(__AVR_ATmega16U4__) || defined(__AVR_ATmega32U4__)
  78. // PE6(INT6)
  79. # if SOFT_SERIAL_PIN == E6
  80. # define EIMSK_BIT _BV(INT6)
  81. # define EICRx_BIT (~(_BV(ISC60) | _BV(ISC61)))
  82. # define SERIAL_PIN_INTERRUPT INT6_vect
  83. # define EICRx EICRB
  84. # endif
  85. # endif
  86. // AT90USBxxx specific config
  87. # if defined(__AVR_AT90USB646__) || defined(__AVR_AT90USB647__) || defined(__AVR_AT90USB1286__) || defined(__AVR_AT90USB1287__)
  88. // PE4..PE7(INT4..INT7)
  89. # if SOFT_SERIAL_PIN == E4
  90. # define EIMSK_BIT _BV(INT4)
  91. # define EICRx_BIT (~(_BV(ISC40) | _BV(ISC41)))
  92. # define SERIAL_PIN_INTERRUPT INT4_vect
  93. # define EICRx EICRB
  94. # elif SOFT_SERIAL_PIN == E5
  95. # define EIMSK_BIT _BV(INT5)
  96. # define EICRx_BIT (~(_BV(ISC50) | _BV(ISC51)))
  97. # define SERIAL_PIN_INTERRUPT INT5_vect
  98. # define EICRx EICRB
  99. # elif SOFT_SERIAL_PIN == E6
  100. # define EIMSK_BIT _BV(INT6)
  101. # define EICRx_BIT (~(_BV(ISC60) | _BV(ISC61)))
  102. # define SERIAL_PIN_INTERRUPT INT6_vect
  103. # define EICRx EICRB
  104. # elif SOFT_SERIAL_PIN == E7
  105. # define EIMSK_BIT _BV(INT7)
  106. # define EICRx_BIT (~(_BV(ISC70) | _BV(ISC71)))
  107. # define SERIAL_PIN_INTERRUPT INT7_vect
  108. # define EICRx EICRB
  109. # endif
  110. # endif
  111. # ifndef SERIAL_PIN_INTERRUPT
  112. # error invalid SOFT_SERIAL_PIN value
  113. # endif
  114. # define ALWAYS_INLINE __attribute__((always_inline))
  115. # define NO_INLINE __attribute__((noinline))
  116. # define _delay_sub_us(x) __builtin_avr_delay_cycles(x)
  117. // parity check
  118. # define ODD_PARITY 1
  119. # define EVEN_PARITY 0
  120. # define PARITY EVEN_PARITY
  121. # ifdef SERIAL_DELAY
  122. // custom setup in config.h
  123. // #define TID_SEND_ADJUST 2
  124. // #define SERIAL_DELAY 6 // micro sec
  125. // #define READ_WRITE_START_ADJUST 30 // cycles
  126. // #define READ_WRITE_WIDTH_ADJUST 8 // cycles
  127. # else
  128. // ============ Standard setups ============
  129. # ifndef SELECT_SOFT_SERIAL_SPEED
  130. # define SELECT_SOFT_SERIAL_SPEED 1
  131. // 0: about 189kbps (Experimental only)
  132. // 1: about 137kbps (default)
  133. // 2: about 75kbps
  134. // 3: about 39kbps
  135. // 4: about 26kbps
  136. // 5: about 20kbps
  137. # endif
  138. # if __GNUC__ < 6
  139. # define TID_SEND_ADJUST 14
  140. # else
  141. # define TID_SEND_ADJUST 2
  142. # endif
  143. # if SELECT_SOFT_SERIAL_SPEED == 0
  144. // Very High speed
  145. # define SERIAL_DELAY 4 // micro sec
  146. # if __GNUC__ < 6
  147. # define READ_WRITE_START_ADJUST 33 // cycles
  148. # define READ_WRITE_WIDTH_ADJUST 3 // cycles
  149. # else
  150. # define READ_WRITE_START_ADJUST 34 // cycles
  151. # define READ_WRITE_WIDTH_ADJUST 7 // cycles
  152. # endif
  153. # elif SELECT_SOFT_SERIAL_SPEED == 1
  154. // High speed
  155. # define SERIAL_DELAY 6 // micro sec
  156. # if __GNUC__ < 6
  157. # define READ_WRITE_START_ADJUST 30 // cycles
  158. # define READ_WRITE_WIDTH_ADJUST 3 // cycles
  159. # else
  160. # define READ_WRITE_START_ADJUST 33 // cycles
  161. # define READ_WRITE_WIDTH_ADJUST 7 // cycles
  162. # endif
  163. # elif SELECT_SOFT_SERIAL_SPEED == 2
  164. // Middle speed
  165. # define SERIAL_DELAY 12 // micro sec
  166. # define READ_WRITE_START_ADJUST 30 // cycles
  167. # if __GNUC__ < 6
  168. # define READ_WRITE_WIDTH_ADJUST 3 // cycles
  169. # else
  170. # define READ_WRITE_WIDTH_ADJUST 7 // cycles
  171. # endif
  172. # elif SELECT_SOFT_SERIAL_SPEED == 3
  173. // Low speed
  174. # define SERIAL_DELAY 24 // micro sec
  175. # define READ_WRITE_START_ADJUST 30 // cycles
  176. # if __GNUC__ < 6
  177. # define READ_WRITE_WIDTH_ADJUST 3 // cycles
  178. # else
  179. # define READ_WRITE_WIDTH_ADJUST 7 // cycles
  180. # endif
  181. # elif SELECT_SOFT_SERIAL_SPEED == 4
  182. // Very Low speed
  183. # define SERIAL_DELAY 36 // micro sec
  184. # define READ_WRITE_START_ADJUST 30 // cycles
  185. # if __GNUC__ < 6
  186. # define READ_WRITE_WIDTH_ADJUST 3 // cycles
  187. # else
  188. # define READ_WRITE_WIDTH_ADJUST 7 // cycles
  189. # endif
  190. # elif SELECT_SOFT_SERIAL_SPEED == 5
  191. // Ultra Low speed
  192. # define SERIAL_DELAY 48 // micro sec
  193. # define READ_WRITE_START_ADJUST 30 // cycles
  194. # if __GNUC__ < 6
  195. # define READ_WRITE_WIDTH_ADJUST 3 // cycles
  196. # else
  197. # define READ_WRITE_WIDTH_ADJUST 7 // cycles
  198. # endif
  199. # else
  200. # error invalid SELECT_SOFT_SERIAL_SPEED value
  201. # endif /* SELECT_SOFT_SERIAL_SPEED */
  202. # endif /* SERIAL_DELAY */
  203. # define SERIAL_DELAY_HALF1 (SERIAL_DELAY / 2)
  204. # define SERIAL_DELAY_HALF2 (SERIAL_DELAY - SERIAL_DELAY / 2)
  205. # define SLAVE_INT_WIDTH_US 1
  206. # define SLAVE_INT_ACK_WIDTH_UNIT 2
  207. # define SLAVE_INT_ACK_WIDTH 4
  208. inline static void serial_delay(void) ALWAYS_INLINE;
  209. inline static void serial_delay(void) { _delay_us(SERIAL_DELAY); }
  210. inline static void serial_delay_half1(void) ALWAYS_INLINE;
  211. inline static void serial_delay_half1(void) { _delay_us(SERIAL_DELAY_HALF1); }
  212. inline static void serial_delay_half2(void) ALWAYS_INLINE;
  213. inline static void serial_delay_half2(void) { _delay_us(SERIAL_DELAY_HALF2); }
  214. inline static void serial_output(void) ALWAYS_INLINE;
  215. inline static void serial_output(void) { setPinOutput(SOFT_SERIAL_PIN); }
  216. // make the serial pin an input with pull-up resistor
  217. inline static void serial_input_with_pullup(void) ALWAYS_INLINE;
  218. inline static void serial_input_with_pullup(void) { setPinInputHigh(SOFT_SERIAL_PIN); }
  219. inline static uint8_t serial_read_pin(void) ALWAYS_INLINE;
  220. inline static uint8_t serial_read_pin(void) { return !!readPin(SOFT_SERIAL_PIN); }
  221. inline static void serial_low(void) ALWAYS_INLINE;
  222. inline static void serial_low(void) { writePinLow(SOFT_SERIAL_PIN); }
  223. inline static void serial_high(void) ALWAYS_INLINE;
  224. inline static void serial_high(void) { writePinHigh(SOFT_SERIAL_PIN); }
  225. void soft_serial_initiator_init(void) {
  226. serial_output();
  227. serial_high();
  228. }
  229. void soft_serial_target_init(void) {
  230. serial_input_with_pullup();
  231. // Enable INT0-INT7
  232. EIMSK |= EIMSK_BIT;
  233. EICRx &= EICRx_BIT;
  234. }
  235. // Used by the sender to synchronize timing with the reciver.
  236. static void sync_recv(void) NO_INLINE;
  237. static void sync_recv(void) {
  238. for (uint8_t i = 0; i < SERIAL_DELAY * 5 && serial_read_pin(); i++) {
  239. }
  240. // This shouldn't hang if the target disconnects because the
  241. // serial line will float to high if the target does disconnect.
  242. while (!serial_read_pin())
  243. ;
  244. }
  245. // Used by the reciver to send a synchronization signal to the sender.
  246. static void sync_send(void) NO_INLINE;
  247. static void sync_send(void) {
  248. serial_low();
  249. serial_delay();
  250. serial_high();
  251. }
  252. // Reads a byte from the serial line
  253. static uint8_t serial_read_chunk(uint8_t *pterrcount, uint8_t bit) NO_INLINE;
  254. static uint8_t serial_read_chunk(uint8_t *pterrcount, uint8_t bit) {
  255. uint8_t byte, i, p, pb;
  256. _delay_sub_us(READ_WRITE_START_ADJUST);
  257. for (i = 0, byte = 0, p = PARITY; i < bit; i++) {
  258. serial_delay_half1(); // read the middle of pulses
  259. if (serial_read_pin()) {
  260. byte = (byte << 1) | 1;
  261. p ^= 1;
  262. } else {
  263. byte = (byte << 1) | 0;
  264. p ^= 0;
  265. }
  266. _delay_sub_us(READ_WRITE_WIDTH_ADJUST);
  267. serial_delay_half2();
  268. }
  269. /* recive parity bit */
  270. serial_delay_half1(); // read the middle of pulses
  271. pb = serial_read_pin();
  272. _delay_sub_us(READ_WRITE_WIDTH_ADJUST);
  273. serial_delay_half2();
  274. *pterrcount += (p != pb) ? 1 : 0;
  275. return byte;
  276. }
  277. // Sends a byte with MSB ordering
  278. void serial_write_chunk(uint8_t data, uint8_t bit) NO_INLINE;
  279. void serial_write_chunk(uint8_t data, uint8_t bit) {
  280. uint8_t b, p;
  281. for (p = PARITY, b = 1 << (bit - 1); b; b >>= 1) {
  282. if (data & b) {
  283. serial_high();
  284. p ^= 1;
  285. } else {
  286. serial_low();
  287. p ^= 0;
  288. }
  289. serial_delay();
  290. }
  291. /* send parity bit */
  292. if (p & 1) {
  293. serial_high();
  294. } else {
  295. serial_low();
  296. }
  297. serial_delay();
  298. serial_low(); // sync_send() / senc_recv() need raise edge
  299. }
  300. static void serial_send_packet(uint8_t *buffer, uint8_t size) NO_INLINE;
  301. static void serial_send_packet(uint8_t *buffer, uint8_t size) {
  302. for (uint8_t i = 0; i < size; ++i) {
  303. uint8_t data;
  304. data = buffer[i];
  305. sync_send();
  306. serial_write_chunk(data, 8);
  307. }
  308. }
  309. static uint8_t serial_recive_packet(uint8_t *buffer, uint8_t size) NO_INLINE;
  310. static uint8_t serial_recive_packet(uint8_t *buffer, uint8_t size) {
  311. uint8_t pecount = 0;
  312. for (uint8_t i = 0; i < size; ++i) {
  313. uint8_t data;
  314. sync_recv();
  315. data = serial_read_chunk(&pecount, 8);
  316. buffer[i] = data;
  317. }
  318. return pecount == 0;
  319. }
  320. inline static void change_sender2reciver(void) {
  321. sync_send(); // 0
  322. serial_delay_half1(); // 1
  323. serial_low(); // 2
  324. serial_input_with_pullup(); // 2
  325. serial_delay_half1(); // 3
  326. }
  327. inline static void change_reciver2sender(void) {
  328. sync_recv(); // 0
  329. serial_delay(); // 1
  330. serial_low(); // 3
  331. serial_output(); // 3
  332. serial_delay_half1(); // 4
  333. }
  334. static inline uint8_t nibble_bits_count(uint8_t bits) {
  335. bits = (bits & 0x5) + (bits >> 1 & 0x5);
  336. bits = (bits & 0x3) + (bits >> 2 & 0x3);
  337. return bits;
  338. }
  339. // interrupt handle to be used by the target device
  340. ISR(SERIAL_PIN_INTERRUPT) {
  341. // recive transaction table index
  342. uint8_t tid, bits;
  343. uint8_t pecount = 0;
  344. sync_recv();
  345. bits = serial_read_chunk(&pecount, 8);
  346. tid = bits >> 3;
  347. bits = (bits & 7) != (nibble_bits_count(tid) & 7);
  348. if (bits || pecount > 0 || tid > NUM_TOTAL_TRANSACTIONS) {
  349. return;
  350. }
  351. serial_delay_half1();
  352. serial_high(); // response step1 low->high
  353. serial_output();
  354. _delay_sub_us(SLAVE_INT_ACK_WIDTH_UNIT * SLAVE_INT_ACK_WIDTH);
  355. split_transaction_desc_t *trans = &split_transaction_table[tid];
  356. serial_low(); // response step2 ack high->low
  357. // If the transaction has a callback, we can execute it now
  358. if (trans->slave_callback) {
  359. trans->slave_callback(trans->initiator2target_buffer_size, split_trans_initiator2target_buffer(trans), trans->target2initiator_buffer_size, split_trans_target2initiator_buffer(trans));
  360. }
  361. // target send phase
  362. if (trans->target2initiator_buffer_size > 0) serial_send_packet((uint8_t *)split_trans_target2initiator_buffer(trans), trans->target2initiator_buffer_size);
  363. // target switch to input
  364. change_sender2reciver();
  365. // target recive phase
  366. if (trans->initiator2target_buffer_size > 0) {
  367. serial_recive_packet((uint8_t *)split_trans_initiator2target_buffer(trans), trans->initiator2target_buffer_size);
  368. }
  369. sync_recv(); // weit initiator output to high
  370. }
  371. /////////
  372. // start transaction by initiator
  373. //
  374. // bool soft_serial_transaction(int sstd_index)
  375. //
  376. // this code is very time dependent, so we need to disable interrupts
  377. bool soft_serial_transaction(int sstd_index) {
  378. if (sstd_index > NUM_TOTAL_TRANSACTIONS) return false;
  379. split_transaction_desc_t *trans = &split_transaction_table[sstd_index];
  380. cli();
  381. // signal to the target that we want to start a transaction
  382. serial_output();
  383. serial_low();
  384. _delay_us(SLAVE_INT_WIDTH_US);
  385. // send transaction table index
  386. int tid = (sstd_index << 3) | (7 & nibble_bits_count(sstd_index));
  387. sync_send();
  388. _delay_sub_us(TID_SEND_ADJUST);
  389. serial_write_chunk(tid, 8);
  390. serial_delay_half1();
  391. // wait for the target response (step1 low->high)
  392. serial_input_with_pullup();
  393. while (!serial_read_pin()) {
  394. _delay_sub_us(2);
  395. }
  396. // check if the target is present (step2 high->low)
  397. for (int i = 0; serial_read_pin(); i++) {
  398. if (i > SLAVE_INT_ACK_WIDTH + 1) {
  399. // slave failed to pull the line low, assume not present
  400. serial_output();
  401. serial_high();
  402. sei();
  403. return false;
  404. }
  405. _delay_sub_us(SLAVE_INT_ACK_WIDTH_UNIT);
  406. }
  407. // initiator recive phase
  408. // if the target is present syncronize with it
  409. if (trans->target2initiator_buffer_size > 0) {
  410. if (!serial_recive_packet((uint8_t *)split_trans_target2initiator_buffer(trans), trans->target2initiator_buffer_size)) {
  411. serial_output();
  412. serial_high();
  413. sei();
  414. return false;
  415. }
  416. }
  417. // initiator switch to output
  418. change_reciver2sender();
  419. // initiator send phase
  420. if (trans->initiator2target_buffer_size > 0) {
  421. serial_send_packet((uint8_t *)split_trans_initiator2target_buffer(trans), trans->initiator2target_buffer_size);
  422. }
  423. // always, release the line when not in use
  424. sync_send();
  425. sei();
  426. return true;
  427. }
  428. #endif
  429. // Helix serial.c history
  430. // 2018-1-29 fork from let's split and add PD2, modify sync_recv() (#2308, bceffdefc)
  431. // 2018-6-28 bug fix master to slave comm and speed up (#3255, 1038bbef4)
  432. // (adjusted with avr-gcc 4.9.2)
  433. // 2018-7-13 remove USE_SERIAL_PD2 macro (#3374, f30d6dd78)
  434. // (adjusted with avr-gcc 4.9.2)
  435. // 2018-8-11 add support multi-type transaction (#3608, feb5e4aae)
  436. // (adjusted with avr-gcc 4.9.2)
  437. // 2018-10-21 fix serial and RGB animation conflict (#4191, 4665e4fff)
  438. // (adjusted with avr-gcc 7.3.0)
  439. // 2018-10-28 re-adjust compiler depend value of delay (#4269, 8517f8a66)
  440. // (adjusted with avr-gcc 5.4.0, 7.3.0)
  441. // 2018-12-17 copy to TOP/quantum/split_common/ and remove backward compatibility code (#4669)