is31fl3741.c 8.5 KB

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  1. /* Copyright 2017 Jason Williams
  2. * Copyright 2018 Jack Humbert
  3. * Copyright 2018 Yiancar
  4. * Copyright 2020 MelGeek
  5. *
  6. * This program is free software: you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation, either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program. If not, see <http://www.gnu.org/licenses/>.
  18. */
  19. #include "wait.h"
  20. #include "is31fl3741.h"
  21. #include <string.h>
  22. #include "i2c_master.h"
  23. #include "progmem.h"
  24. // This is a 7-bit address, that gets left-shifted and bit 0
  25. // set to 0 for write, 1 for read (as per I2C protocol)
  26. // The address will vary depending on your wiring:
  27. // 00 <-> GND
  28. // 01 <-> SCL
  29. // 10 <-> SDA
  30. // 11 <-> VCC
  31. // ADDR1 represents A1:A0 of the 7-bit address.
  32. // ADDR2 represents A3:A2 of the 7-bit address.
  33. // The result is: 0b101(ADDR2)(ADDR1)
  34. #define ISSI_ADDR_DEFAULT 0x60
  35. #define ISSI_COMMANDREGISTER 0xFD
  36. #define ISSI_COMMANDREGISTER_WRITELOCK 0xFE
  37. #define ISSI_INTERRUPTMASKREGISTER 0xF0
  38. #define ISSI_INTERRUPTSTATUSREGISTER 0xF1
  39. #define ISSI_IDREGISTER 0xFC
  40. #define ISSI_PAGE_PWM0 0x00 // PG0
  41. #define ISSI_PAGE_PWM1 0x01 // PG1
  42. #define ISSI_PAGE_SCALING_0 0x02 // PG2
  43. #define ISSI_PAGE_SCALING_1 0x03 // PG3
  44. #define ISSI_PAGE_FUNCTION 0x04 // PG4
  45. #define ISSI_REG_CONFIGURATION 0x00 // PG4
  46. #define ISSI_REG_GLOBALCURRENT 0x01 // PG4
  47. #define ISSI_REG_PULLDOWNUP 0x02 // PG4
  48. #define ISSI_REG_RESET 0x3F // PG4
  49. #ifndef ISSI_TIMEOUT
  50. # define ISSI_TIMEOUT 100
  51. #endif
  52. #ifndef ISSI_PERSISTENCE
  53. # define ISSI_PERSISTENCE 0
  54. #endif
  55. #define ISSI_MAX_LEDS 351
  56. // Transfer buffer for TWITransmitData()
  57. uint8_t g_twi_transfer_buffer[20] = {0xFF};
  58. // These buffers match the IS31FL3741 and IS31FL3741A PWM registers.
  59. // The scaling buffers match the PG2 and PG3 LED On/Off registers.
  60. // Storing them like this is optimal for I2C transfers to the registers.
  61. // We could optimize this and take out the unused registers from these
  62. // buffers and the transfers in IS31FL3741_write_pwm_buffer() but it's
  63. // probably not worth the extra complexity.
  64. uint8_t g_pwm_buffer[DRIVER_COUNT][ISSI_MAX_LEDS];
  65. bool g_pwm_buffer_update_required = false;
  66. bool g_scaling_registers_update_required[DRIVER_COUNT] = {false};
  67. uint8_t g_scaling_registers[DRIVER_COUNT][ISSI_MAX_LEDS];
  68. void IS31FL3741_write_register(uint8_t addr, uint8_t reg, uint8_t data) {
  69. g_twi_transfer_buffer[0] = reg;
  70. g_twi_transfer_buffer[1] = data;
  71. #if ISSI_PERSISTENCE > 0
  72. for (uint8_t i = 0; i < ISSI_PERSISTENCE; i++) {
  73. if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, ISSI_TIMEOUT) == 0) break;
  74. }
  75. #else
  76. i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, ISSI_TIMEOUT);
  77. #endif
  78. }
  79. bool IS31FL3741_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer) {
  80. // unlock the command register and select PG2
  81. IS31FL3741_write_register(addr, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5);
  82. IS31FL3741_write_register(addr, ISSI_COMMANDREGISTER, ISSI_PAGE_PWM0);
  83. for (int i = 0; i < 342; i += 18) {
  84. if (i == 180) {
  85. // unlock the command register and select PG2
  86. IS31FL3741_write_register(addr, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5);
  87. IS31FL3741_write_register(addr, ISSI_COMMANDREGISTER, ISSI_PAGE_PWM1);
  88. }
  89. g_twi_transfer_buffer[0] = i % 180;
  90. memcpy(g_twi_transfer_buffer + 1, pwm_buffer + i, 18);
  91. #if ISSI_PERSISTENCE > 0
  92. for (uint8_t i = 0; i < ISSI_PERSISTENCE; i++) {
  93. if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 19, ISSI_TIMEOUT) != 0) {
  94. return false;
  95. }
  96. }
  97. #else
  98. if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 19, ISSI_TIMEOUT) != 0) {
  99. return false;
  100. }
  101. #endif
  102. }
  103. // transfer the left cause the total number is 351
  104. g_twi_transfer_buffer[0] = 162;
  105. memcpy(g_twi_transfer_buffer + 1, pwm_buffer + 342, 9);
  106. #if ISSI_PERSISTENCE > 0
  107. for (uint8_t i = 0; i < ISSI_PERSISTENCE; i++) {
  108. if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 10, ISSI_TIMEOUT) != 0) {
  109. return false;
  110. }
  111. }
  112. #else
  113. if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 10, ISSI_TIMEOUT) != 0) {
  114. return false;
  115. }
  116. #endif
  117. return true;
  118. }
  119. void IS31FL3741_init(uint8_t addr) {
  120. // In order to avoid the LEDs being driven with garbage data
  121. // in the LED driver's PWM registers, shutdown is enabled last.
  122. // Set up the mode and other settings, clear the PWM registers,
  123. // then disable software shutdown.
  124. // Unlock the command register.
  125. // Unlock the command register.
  126. IS31FL3741_write_register(addr, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5);
  127. // Select PG4
  128. IS31FL3741_write_register(addr, ISSI_COMMANDREGISTER, ISSI_PAGE_FUNCTION);
  129. // Set to Normal operation
  130. IS31FL3741_write_register(addr, ISSI_REG_CONFIGURATION, 0x01);
  131. // Set Golbal Current Control Register
  132. IS31FL3741_write_register(addr, ISSI_REG_GLOBALCURRENT, 0xFF);
  133. // Set Pull up & Down for SWx CSy
  134. IS31FL3741_write_register(addr, ISSI_REG_PULLDOWNUP, 0x77);
  135. // IS31FL3741_update_led_scaling_registers(addr, 0xFF, 0xFF, 0xFF);
  136. // Wait 10ms to ensure the device has woken up.
  137. wait_ms(10);
  138. }
  139. void IS31FL3741_set_color(int index, uint8_t red, uint8_t green, uint8_t blue) {
  140. if (index >= 0 && index < DRIVER_LED_TOTAL) {
  141. is31_led led = g_is31_leds[index];
  142. g_pwm_buffer[led.driver][led.r] = red;
  143. g_pwm_buffer[led.driver][led.g] = green;
  144. g_pwm_buffer[led.driver][led.b] = blue;
  145. g_pwm_buffer_update_required = true;
  146. }
  147. }
  148. void IS31FL3741_set_color_all(uint8_t red, uint8_t green, uint8_t blue) {
  149. for (int i = 0; i < DRIVER_LED_TOTAL; i++) {
  150. IS31FL3741_set_color(i, red, green, blue);
  151. }
  152. }
  153. void IS31FL3741_set_led_control_register(uint8_t index, bool red, bool green, bool blue) {
  154. is31_led led = g_is31_leds[index];
  155. if (red) {
  156. g_scaling_registers[led.driver][led.r] = 0xFF;
  157. } else {
  158. g_scaling_registers[led.driver][led.r] = 0x00;
  159. }
  160. if (green) {
  161. g_scaling_registers[led.driver][led.g] = 0xFF;
  162. } else {
  163. g_scaling_registers[led.driver][led.g] = 0x00;
  164. }
  165. if (blue) {
  166. g_scaling_registers[led.driver][led.b] = 0xFF;
  167. } else {
  168. g_scaling_registers[led.driver][led.b] = 0x00;
  169. }
  170. g_scaling_registers_update_required[led.driver] = true;
  171. }
  172. void IS31FL3741_update_pwm_buffers(uint8_t addr1, uint8_t addr2) {
  173. if (g_pwm_buffer_update_required) {
  174. IS31FL3741_write_pwm_buffer(addr1, g_pwm_buffer[0]);
  175. }
  176. g_pwm_buffer_update_required = false;
  177. }
  178. void IS31FL3741_set_pwm_buffer(const is31_led *pled, uint8_t red, uint8_t green, uint8_t blue) {
  179. g_pwm_buffer[pled->driver][pled->r] = red;
  180. g_pwm_buffer[pled->driver][pled->g] = green;
  181. g_pwm_buffer[pled->driver][pled->b] = blue;
  182. g_pwm_buffer_update_required = true;
  183. }
  184. void IS31FL3741_update_led_control_registers(uint8_t addr, uint8_t index) {
  185. if (g_scaling_registers_update_required[index]) {
  186. // unlock the command register and select PG2
  187. IS31FL3741_write_register(addr, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5);
  188. IS31FL3741_write_register(addr, ISSI_COMMANDREGISTER, ISSI_PAGE_SCALING_0);
  189. // CS1_SW1 to CS30_SW6 are on PG2
  190. for (int i = CS1_SW1; i <= CS30_SW6; ++i) {
  191. IS31FL3741_write_register(addr, i, g_scaling_registers[0][i]);
  192. }
  193. // unlock the command register and select PG3
  194. IS31FL3741_write_register(addr, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5);
  195. IS31FL3741_write_register(addr, ISSI_COMMANDREGISTER, ISSI_PAGE_SCALING_1);
  196. // CS1_SW7 to CS39_SW9 are on PG3
  197. for (int i = CS1_SW7; i <= CS39_SW9; ++i) {
  198. IS31FL3741_write_register(addr, i - CS1_SW7, g_scaling_registers[0][i]);
  199. }
  200. g_scaling_registers_update_required[index] = false;
  201. }
  202. }
  203. void IS31FL3741_set_scaling_registers(const is31_led *pled, uint8_t red, uint8_t green, uint8_t blue) {
  204. g_scaling_registers[pled->driver][pled->r] = red;
  205. g_scaling_registers[pled->driver][pled->g] = green;
  206. g_scaling_registers[pled->driver][pled->b] = blue;
  207. g_scaling_registers_update_required[pled->driver] = true;
  208. }