i2c_master.c 4.5 KB

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  1. /* Copyright 2018 Jack Humbert
  2. * Copyright 2018 Yiancar
  3. *
  4. * This program is free software: you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License as published by
  6. * the Free Software Foundation, either version 2 of the License, or
  7. * (at your option) any later version.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program. If not, see <http://www.gnu.org/licenses/>.
  16. */
  17. /* This library is only valid for STM32 processors.
  18. * This library follows the convention of the AVR i2c_master library.
  19. * As a result addresses are expected to be already shifted (addr << 1).
  20. * I2CD1 is the default driver which corresponds to pins B6 and B7. This
  21. * can be changed.
  22. * Please ensure that HAL_USE_I2C is TRUE in the halconf.h file and that
  23. * STM32_I2C_USE_I2C1 is TRUE in the mcuconf.h file. Pins B6 and B7 are used
  24. * but using any other I2C pins should be trivial.
  25. */
  26. #include "quantum.h"
  27. #include "i2c_master.h"
  28. #include <string.h>
  29. #include <hal.h>
  30. static uint8_t i2c_address;
  31. static const I2CConfig i2cconfig = {
  32. #if defined(USE_I2CV1_CONTRIB)
  33. I2C1_CLOCK_SPEED,
  34. #elif defined(USE_I2CV1)
  35. I2C1_OPMODE,
  36. I2C1_CLOCK_SPEED,
  37. I2C1_DUTY_CYCLE,
  38. #else
  39. // This configures the I2C clock to 400khz assuming a 72Mhz clock
  40. // For more info : https://www.st.com/en/embedded-software/stsw-stm32126.html
  41. STM32_TIMINGR_PRESC(I2C1_TIMINGR_PRESC) | STM32_TIMINGR_SCLDEL(I2C1_TIMINGR_SCLDEL) | STM32_TIMINGR_SDADEL(I2C1_TIMINGR_SDADEL) | STM32_TIMINGR_SCLH(I2C1_TIMINGR_SCLH) | STM32_TIMINGR_SCLL(I2C1_TIMINGR_SCLL), 0, 0
  42. #endif
  43. };
  44. static i2c_status_t chibios_to_qmk(const msg_t* status) {
  45. switch (*status) {
  46. case I2C_NO_ERROR:
  47. return I2C_STATUS_SUCCESS;
  48. case I2C_TIMEOUT:
  49. return I2C_STATUS_TIMEOUT;
  50. // I2C_BUS_ERROR, I2C_ARBITRATION_LOST, I2C_ACK_FAILURE, I2C_OVERRUN, I2C_PEC_ERROR, I2C_SMB_ALERT
  51. default:
  52. return I2C_STATUS_ERROR;
  53. }
  54. }
  55. __attribute__((weak)) void i2c_init(void) {
  56. // Try releasing special pins for a short time
  57. palSetPadMode(I2C1_SCL_BANK, I2C1_SCL, PAL_MODE_INPUT);
  58. palSetPadMode(I2C1_SDA_BANK, I2C1_SDA, PAL_MODE_INPUT);
  59. chThdSleepMilliseconds(10);
  60. #if defined(USE_GPIOV1)
  61. palSetPadMode(I2C1_SCL_BANK, I2C1_SCL, I2C1_SCL_PAL_MODE);
  62. palSetPadMode(I2C1_SDA_BANK, I2C1_SDA, I2C1_SDA_PAL_MODE);
  63. #else
  64. palSetPadMode(I2C1_SCL_BANK, I2C1_SCL, PAL_MODE_ALTERNATE(I2C1_SCL_PAL_MODE) | PAL_STM32_OTYPE_OPENDRAIN);
  65. palSetPadMode(I2C1_SDA_BANK, I2C1_SDA, PAL_MODE_ALTERNATE(I2C1_SDA_PAL_MODE) | PAL_STM32_OTYPE_OPENDRAIN);
  66. #endif
  67. }
  68. i2c_status_t i2c_start(uint8_t address) {
  69. i2c_address = address;
  70. i2cStart(&I2C_DRIVER, &i2cconfig);
  71. return I2C_STATUS_SUCCESS;
  72. }
  73. i2c_status_t i2c_transmit(uint8_t address, const uint8_t* data, uint16_t length, uint16_t timeout) {
  74. i2c_address = address;
  75. i2cStart(&I2C_DRIVER, &i2cconfig);
  76. msg_t status = i2cMasterTransmitTimeout(&I2C_DRIVER, (i2c_address >> 1), data, length, 0, 0, TIME_MS2I(timeout));
  77. return chibios_to_qmk(&status);
  78. }
  79. i2c_status_t i2c_receive(uint8_t address, uint8_t* data, uint16_t length, uint16_t timeout) {
  80. i2c_address = address;
  81. i2cStart(&I2C_DRIVER, &i2cconfig);
  82. msg_t status = i2cMasterReceiveTimeout(&I2C_DRIVER, (i2c_address >> 1), data, length, TIME_MS2I(timeout));
  83. return chibios_to_qmk(&status);
  84. }
  85. i2c_status_t i2c_writeReg(uint8_t devaddr, uint8_t regaddr, const uint8_t* data, uint16_t length, uint16_t timeout) {
  86. i2c_address = devaddr;
  87. i2cStart(&I2C_DRIVER, &i2cconfig);
  88. uint8_t complete_packet[length + 1];
  89. for (uint8_t i = 0; i < length; i++) {
  90. complete_packet[i + 1] = data[i];
  91. }
  92. complete_packet[0] = regaddr;
  93. msg_t status = i2cMasterTransmitTimeout(&I2C_DRIVER, (i2c_address >> 1), complete_packet, length + 1, 0, 0, TIME_MS2I(timeout));
  94. return chibios_to_qmk(&status);
  95. }
  96. i2c_status_t i2c_readReg(uint8_t devaddr, uint8_t regaddr, uint8_t* data, uint16_t length, uint16_t timeout) {
  97. i2c_address = devaddr;
  98. i2cStart(&I2C_DRIVER, &i2cconfig);
  99. msg_t status = i2cMasterTransmitTimeout(&I2C_DRIVER, (i2c_address >> 1), &regaddr, 1, data, length, TIME_MS2I(timeout));
  100. return chibios_to_qmk(&status);
  101. }
  102. void i2c_stop(void) { i2cStop(&I2C_DRIVER); }