sleep_led.c 6.2 KB

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  1. #include "ch.h"
  2. #include "hal.h"
  3. #include "led.h"
  4. #include "sleep_led.h"
  5. /* All right, we go the "software" way: timer, toggle LED in interrupt.
  6. * Based on hasu's code for AVRs.
  7. * Use LP timer on Kinetises, TIM14 on STM32F0.
  8. */
  9. #if defined(KL2x) || defined(K20x)
  10. /* Use Low Power Timer (LPTMR) */
  11. # define TIMER_INTERRUPT_VECTOR KINETIS_LPTMR0_IRQ_VECTOR
  12. # define RESET_COUNTER LPTMR0->CSR |= LPTMRx_CSR_TCF
  13. #elif defined(STM32F0XX)
  14. /* Use TIM14 manually */
  15. # define TIMER_INTERRUPT_VECTOR STM32_TIM14_HANDLER
  16. # define RESET_COUNTER STM32_TIM14->SR &= ~STM32_TIM_SR_UIF
  17. #endif
  18. #if defined(KL2x) || defined(K20x) || defined(STM32F0XX) /* common parts for timers/interrupts */
  19. /* Breathing Sleep LED brighness(PWM On period) table
  20. * (64[steps] * 4[duration]) / 64[PWM periods/s] = 4 second breath cycle
  21. *
  22. * http://www.wolframalpha.com/input/?i=%28sin%28+x%2F64*pi%29**8+*+255%2C+x%3D0+to+63
  23. * (0..63).each {|x| p ((sin(x/64.0*PI)**8)*255).to_i }
  24. */
  25. static const uint8_t breathing_table[64] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 4, 6, 10, 15, 23, 32, 44, 58, 74, 93, 113, 135, 157, 179, 199, 218, 233, 245, 252, 255, 252, 245, 233, 218, 199, 179, 157, 135, 113, 93, 74, 58, 44, 32, 23, 15, 10, 6, 4, 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
  26. /* interrupt handler */
  27. OSAL_IRQ_HANDLER(TIMER_INTERRUPT_VECTOR) {
  28. OSAL_IRQ_PROLOGUE();
  29. /* Software PWM
  30. * timer:1111 1111 1111 1111
  31. * \_____/\/ \_______/____ count(0-255)
  32. * \ \______________ duration of step(4)
  33. * \__________________ index of step table(0-63)
  34. */
  35. // this works for cca 65536 irqs/sec
  36. static union {
  37. uint16_t row;
  38. struct {
  39. uint8_t count : 8;
  40. uint8_t duration : 2;
  41. uint8_t index : 6;
  42. } pwm;
  43. } timer = {.row = 0};
  44. timer.row++;
  45. // LED on
  46. if (timer.pwm.count == 0) {
  47. led_set(1 << USB_LED_CAPS_LOCK);
  48. }
  49. // LED off
  50. if (timer.pwm.count == breathing_table[timer.pwm.index]) {
  51. led_set(0);
  52. }
  53. /* Reset the counter */
  54. RESET_COUNTER;
  55. OSAL_IRQ_EPILOGUE();
  56. }
  57. #endif /* common parts for known platforms */
  58. #if defined(KL2x) || defined(K20x) /* platform selection: familiar Kinetis chips */
  59. /* LPTMR clock options */
  60. # define LPTMR_CLOCK_MCGIRCLK 0 /* 4MHz clock */
  61. # define LPTMR_CLOCK_LPO 1 /* 1kHz clock */
  62. # define LPTMR_CLOCK_ERCLK32K 2 /* external 32kHz crystal */
  63. # define LPTMR_CLOCK_OSCERCLK 3 /* output from OSC */
  64. /* Work around inconsistencies in Freescale naming */
  65. # if !defined(SIM_SCGC5_LPTMR)
  66. # define SIM_SCGC5_LPTMR SIM_SCGC5_LPTIMER
  67. # endif
  68. /* Initialise the timer */
  69. void sleep_led_init(void) {
  70. /* Make sure the clock to the LPTMR is enabled */
  71. SIM->SCGC5 |= SIM_SCGC5_LPTMR;
  72. /* Reset LPTMR settings */
  73. LPTMR0->CSR = 0;
  74. /* Set the compare value */
  75. LPTMR0->CMR = 0; // trigger on counter value (i.e. every time)
  76. /* Set up clock source and prescaler */
  77. /* Software PWM
  78. * ______ ______ __
  79. * | ON |___OFF___| ON |___OFF___| ....
  80. * |<-------------->|<-------------->|<- ....
  81. * PWM period PWM period
  82. *
  83. * R interrupts/period[resolution]
  84. * F periods/second[frequency]
  85. * R * F interrupts/second
  86. */
  87. /* === OPTION 1 === */
  88. # if 0
  89. // 1kHz LPO
  90. // No prescaler => 1024 irqs/sec
  91. // Note: this is too slow for a smooth breathe
  92. LPTMR0->PSR = LPTMRx_PSR_PCS(LPTMR_CLOCK_LPO)|LPTMRx_PSR_PBYP;
  93. # endif /* OPTION 1 */
  94. /* === OPTION 2 === */
  95. # if 1
  96. // nMHz IRC (n=4 on KL25Z, KL26Z and K20x; n=2 or 8 on KL27Z)
  97. MCG->C2 |= MCG_C2_IRCS; // fast (4MHz) internal ref clock
  98. # if defined(KL27) // divide the 8MHz IRC by 2, to have the same MCGIRCLK speed as others
  99. MCG->MC |= MCG_MC_LIRC_DIV2_DIV2;
  100. # endif /* KL27 */
  101. MCG->C1 |= MCG_C1_IRCLKEN; // enable internal ref clock
  102. // to work in stop mode, also MCG_C1_IREFSTEN
  103. // Divide 4MHz by 2^N (N=6) => 62500 irqs/sec =>
  104. // => approx F=61, R=256, duration = 4
  105. LPTMR0->PSR = LPTMRx_PSR_PCS(LPTMR_CLOCK_MCGIRCLK) | LPTMRx_PSR_PRESCALE(6);
  106. # endif /* OPTION 2 */
  107. /* === OPTION 3 === */
  108. # if 0
  109. // OSC output (external crystal), usually 8MHz or 16MHz
  110. OSC0->CR |= OSC_CR_ERCLKEN; // enable ext ref clock
  111. // to work in stop mode, also OSC_CR_EREFSTEN
  112. // Divide by 2^N
  113. LPTMR0->PSR = LPTMRx_PSR_PCS(LPTMR_CLOCK_OSCERCLK)|LPTMRx_PSR_PRESCALE(7);
  114. # endif /* OPTION 3 */
  115. /* === END OPTIONS === */
  116. /* Interrupt on TCF set (compare flag) */
  117. nvicEnableVector(LPTMR0_IRQn, 2); // vector, priority
  118. LPTMR0->CSR |= LPTMRx_CSR_TIE;
  119. }
  120. void sleep_led_enable(void) {
  121. /* Enable the timer */
  122. LPTMR0->CSR |= LPTMRx_CSR_TEN;
  123. }
  124. void sleep_led_disable(void) {
  125. /* Disable the timer */
  126. LPTMR0->CSR &= ~LPTMRx_CSR_TEN;
  127. }
  128. void sleep_led_toggle(void) {
  129. /* Toggle the timer */
  130. LPTMR0->CSR ^= LPTMRx_CSR_TEN;
  131. }
  132. #elif defined(STM32F0XX) /* platform selection: STM32F0XX */
  133. /* Initialise the timer */
  134. void sleep_led_init(void) {
  135. /* enable clock */
  136. rccEnableTIM14(FALSE); /* low power enable = FALSE */
  137. rccResetTIM14();
  138. /* prescale */
  139. /* Assuming 48MHz internal clock */
  140. /* getting cca 65484 irqs/sec */
  141. STM32_TIM14->PSC = 733;
  142. /* auto-reload */
  143. /* 0 => interrupt every time */
  144. STM32_TIM14->ARR = 3;
  145. /* enable counter update event interrupt */
  146. STM32_TIM14->DIER |= STM32_TIM_DIER_UIE;
  147. /* register interrupt vector */
  148. nvicEnableVector(STM32_TIM14_NUMBER, 2); /* vector, priority */
  149. }
  150. void sleep_led_enable(void) {
  151. /* Enable the timer */
  152. STM32_TIM14->CR1 = STM32_TIM_CR1_CEN | STM32_TIM_CR1_URS;
  153. /* URS => update event only on overflow; setting UG bit disabled */
  154. }
  155. void sleep_led_disable(void) {
  156. /* Disable the timer */
  157. STM32_TIM14->CR1 = 0;
  158. }
  159. void sleep_led_toggle(void) {
  160. /* Toggle the timer */
  161. STM32_TIM14->CR1 ^= STM32_TIM_CR1_CEN;
  162. }
  163. #else /* platform selection: not on familiar chips */
  164. void sleep_led_init(void) {}
  165. void sleep_led_enable(void) { led_set(1 << USB_LED_CAPS_LOCK); }
  166. void sleep_led_disable(void) { led_set(0); }
  167. void sleep_led_toggle(void) {
  168. // not implemented
  169. }
  170. #endif /* platform selection */